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4 followers · 4 following
  • National Taiwan University of Science and Technology, EE (ICS)
  • Taipei, Taiwan
  • 17:04 (UTC +08:00)
  • LinkedIn in/-marco-lin

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akira2963753/README.md

Hi, I'm Marco, A Digital IC Design Student from Taiwan.

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  1. Low-Cost-AI-Accelerator-Based-on-TPU Low-Cost-AI-Accelerator-Based-on-TPU Public

    This is my senior project, we aim to design a Low-cost-AI-Accelerator based on Google's Tensor Processing Unit.

    Verilog 12

  2. RISC-V-CPU-on-FPGA RISC-V-CPU-on-FPGA Public

    32-bit Pipelined RISC-V CPU Based on RV32I & RV32M including Forwarding, Hazard, Flush, Brach Predictor and two L1 Cache to transmiss data with BRAM using the AXI bus.

    Verilog 7